OpenVSD-2020-TL-verilog-session
Here is the ppt of the session happened on 8th oct by VSDOpen 2020 and guided by Steeve Hoover, Vineet Jain and Shivam Potdar .
Click hereHey I'm Mayank Kabra
I am a Second Year student pursuing iMTech program in ECE at IIIT Bangalore. I'm currently focusing at learning and developing my skills. I'm majorly interested in verilog. I'm always learning and I have developed a passion for programming processors and hardware design.
Check out my Verilog projects here.
Click here:
https://github.com/mayank-kabra2001/verilog
Check out my Python projects here.
Click here:
https://github.com/mayank-kabra2001/python
Check out my Python projects here.
Click here:
https://github.com/mayank-kabra2001/cuda
Here is the ppt of the session happened on 8th oct by VSDOpen 2020 and guided by Steeve Hoover, Vineet Jain and Shivam Potdar .
Click hereJuly 2019 - Feb 2024
Second Year Student of iMTech program in ECE currently enroled in IIITB.
July 2017 - Feb 2019
CGPA: 8.5/10
July 2015 - Feb 2017
Secured 10 CGPA in 10th Standard
June 2020 - August 2020
7th October 2020
8th October 2020
1st April 2020